The present invention relates to the fabrication of semiconductor-based devices. More particularly, the present invention relates to improved techniques for fabricating semiconductor-based devices with low-k dielectric layers.
In semiconductor-based device (e.g., integrated circuits or flat panel displays) manufacturing, dual damascene structures may be used in conjunction with copper conductor material to reduce the RC delays associated with signal propagation in aluminum based materials used in previous generation technologies. In dual damascene, instead of etching the conductor material, vias and trenches may be etched into the dielectric material and filled with copper (referred to as “metallization”). The excess copper may be removed by chemical mechanical polishing (CMP) leaving copper lines connected by vias for signal transmission. To reduce the RC delays even further, porous low-k dielectric constant materials may be used. In the specification and claims low-k is defined as k<3.0.
Porous low dielectric constant materials may include organo-silicate glass (OSG) materials, which are also called carbon-doped silicates. OSG materials may be silicon dioxide doped with organic components such as methyl groups. OSG materials have carbon and hydrogen atoms incorporated into a silicon dioxide lattice, which lowers the dielectric constant of the material. However, OSG materials may be susceptible to damage when exposed to O2, H2, N2, and NH3 gases, which are used for stripping photoresist material or fluorine within a stripping plasma. It is believed that such damage may be caused by the removal of carbon from the low-k dielectric, which increases the dielectric constant and makes the material more hydrophilic so that it retains moisture. The retention of moisture creates metal barrier adhesion problems or may cause other barrier problems.
The damaging effects of stripping plasmas can penetrate deeper into porous material, compared to non-porous (dense) materials. Porous OSG materials (with k<˜2.5) may be very susceptible to damage due to the removal of organic content by exposure to the plasma used to strip the mask and/or sidewalls. For example, photoresist (PR) ashing or stripping process is one of the process steps that cause the most significant damage to such porous low-k dielectric layer, in which the PR material is stripped off under plasma systems. The plasma may diffuse into the pores of the porous OSG layer and cause damage as far as 300 nm into the OSG layer. Part of the damage caused by the plasma is the removal of carbon and hydrogen from the damaged area causing the OSG to be more like silicon dioxide, which has a higher dielectric constant. Damage may be quantified by measuring the change in SiC/SiO ratio of the OSG layer from FTIR analysis. For the typical trench etch application, the modification of OSG more than 3-5 nm into the trench sidewall is unacceptable.
It is desirable to reduce damage to low-k (k<3.0) dielectric layers during the stripping process.